Attachment 4453 Details for Bug 23739 – /var/log/Xorg.0.log.old when this happens

/var/log/Xorg.0.log.old when this happens

Xorg.0.log.old (text/plain), 97.72 KB, created by Ivan Zakharyaschev on 2010-07-07 20:17:39 MSD

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Creator: Ivan Zakharyaschev

Created: 2010-07-07 20:17:39 MSD

Size: 97.72 KB

patch

obsolete

>
>X.Org X Server 1.4.2
>Release Date: 11 June 2008
>X Protocol Version 11, Revision 0
>Build Operating System: ALT Linux 4.0 Terminal (OldSchool) i686
>Current Operating System: Linux localhost.localdomain 2.6.30-std-def-alt15 #1 SMP Mon Dec 14 08:45:48 UTC 2009 i686
>Build Date: 12 November 2008  03:36:34PM
> 
>	Before reporting problems, check https://bugzilla.altlinux.org/
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Wed Jul  7 03:02:34 2010
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Minimal layout"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0|0"
>(**) |   |-->Device "Card0|0"
>(**) Option "AllowMouseOpenFail" "true"
>(**) Option "AIGLX" "true"
>(**) Option "AutoAddDevices" "true"
>(**) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d
>(==) RgbPath set to "/usr/share/X11/rgb"
>(==) ModulePath set to "/usr/lib/X11/modules"
>(II) Loader magic: 0x81c98c0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/X11/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(++) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,27a0 card 104d,8208 rev 03 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,27a2 card 104d,8208 rev 03 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,27a6 card 104d,8208 rev 03 class 03,80,00 hdr 80
>(II) PCI: 00:1b:0: chip 8086,27d8 card 104d,8208 rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,27d0 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,27d2 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,27c8 card 104d,8208 rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,27c9 card 104d,8208 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,27ca card 104d,8208 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:3: chip 8086,27cb card 104d,8208 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,27cc card 104d,8208 rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,2448 card 0000,0000 rev e2 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,27b9 card 104d,8208 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,27df card 104d,8208 rev 02 class 01,01,8a hdr 00
>(II) PCI: 00:1f:3: chip 8086,27da card 104d,8208 rev 02 class 0c,05,00 hdr 00
>(II) PCI: 02:00:0: chip 8086,4222 card 8086,1051 rev 02 class 02,80,00 hdr 00
>(II) PCI: 06:00:0: chip 11ab,4363 card 104d,8208 rev 12 class 02,00,00 hdr 00
>(II) PCI: 07:04:0: chip 1180,0476 card 4000,0000 rev ba class 06,07,00 hdr 82
>(II) PCI: 07:04:4: chip 1180,0592 card 104d,8208 rev 11 class 08,80,00 hdr 80
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,8), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:0), (0,2,5), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x00002000 - 0x000020ff (0x100) IX[B]
>	[1] -1	0	0x00002400 - 0x000024ff (0x100) IX[B]
>	[2] -1	0	0x00002800 - 0x000028ff (0x100) IX[B]
>	[3] -1	0	0x00002c00 - 0x00002cff (0x100) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xf2000000 - 0xf3ffffff (0x2000000) MX[B]
>(II) Bus 2 prefetchable memory range:
>	[0] -1	0	0xf0000000 - 0xf1ffffff (0x2000000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 6: bridge is at (0:28:1), (0,6,6), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 6 I/O range:
>	[0] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[1] -1	0	0x00003400 - 0x000034ff (0x100) IX[B]
>	[2] -1	0	0x00003800 - 0x000038ff (0x100) IX[B]
>	[3] -1	0	0x00003c00 - 0x00003cff (0x100) IX[B]
>(II) Bus 6 non-prefetchable memory range:
>	[0] -1	0	0xf4000000 - 0xf40fffff (0x100000) MX[B]
>(II) Bus 6 prefetchable memory range:
>	[0] -1	0	0x8c000000 - 0x8c0fffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 7: bridge is at (0:30:0), (0,7,11), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 7 I/O range:
>	[0] -1	0	0x00004000 - 0x000040ff (0x100) IX[B]
>	[1] -1	0	0x00004400 - 0x000044ff (0x100) IX[B]
>	[2] -1	0	0x00004800 - 0x000048ff (0x100) IX[B]
>	[3] -1	0	0x00004c00 - 0x00004cff (0x100) IX[B]
>(II) Bus 7 non-prefetchable memory range:
>	[0] -1	0	0xf4100000 - 0xf41fffff (0x100000) MX[B]
>(II) Bus 7 prefetchable memory range:
>	[0] -1	0	0x88000000 - 0x8bffffff (0x4000000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(II) PCI-to-CardBus bridge:
>(II) Bus 8: bridge is at (7:4:0), (7,8,11), BCTRL: 0x0580 (VGA_EN is cleared)
>(II) Bus 8 I/O range:
>	[0] -1	0	0x00004000 - 0x000040ff (0x100) IX[B]
>	[1] -1	0	0x00004400 - 0x000044ff (0x100) IX[B]
>(II) Bus 8 prefetchable memory range:
>	[0] -1	0	0x88000000 - 0x8bffffff (0x4000000) MX[B]
>(--) PCI:*(0:2:0) Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller rev 3, Mem @ 0xf4200000/19, 0xd0000000/28, 0xf4300000/18, I/O @ 0x1800/3
>(--) PCI: (0:2:1) Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller rev 3, Mem @ 0xf4280000/19
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[1] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[2] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[3] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[4] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[5] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[6] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[9] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[10] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[11] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[12] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[13] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[14] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[15] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[16] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[17] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[18] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[19] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[20] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[1] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[2] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[3] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[4] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[5] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[6] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[9] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[10] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[11] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[12] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[13] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[14] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[15] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[16] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[17] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[18] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[19] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[20] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[5] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[6] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[7] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[8] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[9] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[10] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[16] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[17] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[18] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[19] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[23] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[24] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[25] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[26] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/X11/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.2, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/X11/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(**) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/X11/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/X11/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/X11/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "v4l"
>(WW) Warning, couldn't open module v4l
>(II) UnloadModule: "v4l"
>(EE) Failed to load module "v4l" (module does not exist, 0)
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/X11/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 2.4.3
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset 945GM found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[5] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[6] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[7] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[8] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[9] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[10] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[16] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[17] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[18] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[19] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[23] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[24] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[25] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[26] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[5] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[6] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[7] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[8] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[9] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[10] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[13] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[14] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[15] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[19] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[20] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[22] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[23] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[26] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[27] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[28] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[29] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>	[30] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[31] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/X11/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/X11/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/X11/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 945GM
>(--) intel(0): Chipset: "945GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xF4200000
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using XAA for acceleration
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Reloading /usr/lib/X11/modules//libint10.so
>(II) intel(0): initializing int10
>(WW) intel(0): Bad V_BIOS checksum
>(II) intel(0): Primary V_BIOS segment is: 0xc000
>(II) intel(0): VESA BIOS detected
>(II) intel(0): VESA VBE Version 3.0
>(II) intel(0): VESA VBE Total Mem: 7872 kB
>(II) intel(0): VESA VBE OEM: Intel(r) 82945GM Chipset Family Graphics Chip Accelerated VGA BIOS
>(II) intel(0): VESA VBE OEM Software Rev: 1.0
>(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
>(II) intel(0): VESA VBE OEM Product: Intel(r) 82945GM Chipset Family Graphics Controller
>(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0|0
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): found backlight control method /sys/class/backlight/acpi_video0
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Output LVDS using initial mode 1024x768
>(II) intel(0): Monitoring connected displays enabled
>(II) intel(0): detected 256 kB GTT.
>(II) intel(0): detected 7932 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/X11/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "xaa"
>(II) LoadModule: "xaa"
>(II) Loading /usr/lib/X11/modules//libxaa.so
>(II) Module xaa: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x80000203 to 0x00000000
>(WW) intel(0): PIPEASTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status:
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000242 to 0x00000202
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS LBLC_EVENT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS VBLANK_INT_STATUS
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xf4300000 - 0xf433ffff (0x40000) MS[B]
>	[1] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MS[B]
>	[2] 0	0	0xf4200000 - 0xf427ffff (0x80000) MS[B]
>	[3] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[4] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[7] -1	0	0xf4100000 - 0xf41000ff (0x100) MX[B]
>	[8] -1	0	0xf4000000 - 0xf4003fff (0x4000) MX[B]
>	[9] -1	0	0xf2000000 - 0xf2000fff (0x1000) MX[B]
>	[10] -1	0	0xf4544000 - 0xf45443ff (0x400) MX[B]
>	[11] -1	0	0xf4540000 - 0xf4543fff (0x4000) MX[B]
>	[12] -1	0	0xf4280000 - 0xf42fffff (0x80000) MX[B](B)
>	[13] -1	0	0xf4300000 - 0xf433ffff (0x40000) MX[B](B)
>	[14] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[15] -1	0	0xf4200000 - 0xf427ffff (0x80000) MX[B](B)
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[19] 0	0	0x00001800 - 0x00001807 (0x8) IS[B]
>	[20] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[21] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[22] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[23] -1	0	0x000018a0 - 0x000018bf (0x20) IX[B]
>	[24] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[28] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[29] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[30] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[31] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[32] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[33] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>	[34] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[35] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 488960 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1955836 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card1
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card2
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card3
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card4
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card5
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card6
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card7
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card8
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card9
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card10
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card11
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card12
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card13
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card14
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card15
>drmOpenByBusid: drmOpenMinor returns -1
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: node name is /dev/dri/card1
>drmOpenDevice: node name is /dev/dri/card2
>drmOpenDevice: node name is /dev/dri/card3
>drmOpenDevice: node name is /dev/dri/card4
>drmOpenDevice: node name is /dev/dri/card5
>drmOpenDevice: node name is /dev/dri/card6
>drmOpenDevice: node name is /dev/dri/card7
>drmOpenDevice: node name is /dev/dri/card8
>drmOpenDevice: node name is /dev/dri/card9
>drmOpenDevice: node name is /dev/dri/card10
>drmOpenDevice: node name is /dev/dri/card11
>drmOpenDevice: node name is /dev/dri/card12
>drmOpenDevice: node name is /dev/dri/card13
>drmOpenDevice: node name is /dev/dri/card14
>drmOpenDevice: node name is /dev/dri/card15
>(EE) [drm] drmOpen failed.
>(EE) intel(0): [dri] DRIScreenInit failed. Disabling DRI.
>(**) intel(0): Framebuffer compression enabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Allocating 3072 scanlines for pixmap cache
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): adjusting plane->pipe mappings to allow for framebuffer compression
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0xd0000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) intel(0): Using XFree86 Acceleration Architecture (XAA)
>	Screen to screen bit blits
>	Solid filled rectangles
>	8x8 mono pattern filled rectangles
>	Indirect CPU to Screen color expansion
>	Solid Horizontal and Vertical Lines
>	Offscreen Pixmaps
>	Setting up tile and stipple cache:
>		32 128x128 slots
>		16 256x256 slots
>		6 512x512 slots
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01000000 (pgoffset 4096)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB, 0x000000007fe21000 physical
>)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00633fff: overlay registers (4 kB, 0x000000007fe33000 physical
>)
>(II) intel(0): 0x00634000-0x00643fff: xaa scratch (64 kB)
>(II) intel(0): 0x007bf000:            end of stolen memory
>(II) intel(0): 0x01000000-0x01ffffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Failed
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(II) AIGLX: Screen 0 is not DRI capable
>(II) Loading sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /usr/lib/X11/modules/extensions//libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) intel(0): Setting screen physical size to 270 x 203
>(II) config/hal: Adding input device AlpsPS/2 ALPS GlidePoint
>(II) LoadModule: "synaptics"
>(II) Loading /usr/lib/X11/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 0.15.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) Synaptics touchpad driver version 0.15.2
>(II) AlpsPS/2 ALPS GlidePoint: x-axis range 0 - 1023
>(II) AlpsPS/2 ALPS GlidePoint: y-axis range 0 - 767
>(**) Option "Device" "/dev/input/event4"
>(**) Option "SHMConfig" "on"
>(**) Option "LeftEdge" "130"
>(**) Option "RightEdge" "940"
>(**) Option "TopEdge" "100"
>(**) Option "BottomEdge" "700"
>(**) Option "FingerLow" "25"
>(**) Option "FingerHigh" "30"
>(**) Option "MaxTapTime" "180"
>(**) Option "MaxTapMove" "220"
>(**) Option "MaxDoubleTapTime" "300"
>(WW) Option "FastTaps" requires an integer value
>(**) Option "VertScrollDelta" "20"
>(**) Option "HorizScrollDelta" "20"
>(**) Option "VertEdgeScroll" "true"
>(**) Option "HorizEdgeScroll" "true"
>(**) Option "EdgeMotionMinSpeed" "15"
>(**) Option "EdgeMotionMaxSpeed" "30"
>(**) Option "EdgeMotionUseAlways" "true"
>(**) Option "RTCornerButton" "2"
>(**) Option "RBCornerButton" "3"
>(**) Option "TapButton1" "1"
>(**) Option "CircularScrolling" "on"
>(**) Option "CircScrollTrigger" "3"
>(**) Option "PalmDetect" "on"
>(**) Option "SingleTapTimeout" "20"
>(--) AlpsPS/2 ALPS GlidePoint touchpad found
>(**) Option "MinSpeed" "1.00"
>(**) Option "MaxSpeed" "1.75"
>(**) AlpsPS/2 ALPS GlidePoint: always reports core events
>(II) XINPUT: Adding extended input device "AlpsPS/2 ALPS GlidePoint" (type: TOUCHPAD)
>(II) AlpsPS/2 ALPS GlidePoint: x-axis range 0 - 1023
>(II) AlpsPS/2 ALPS GlidePoint: y-axis range 0 - 767
>(--) AlpsPS/2 ALPS GlidePoint touchpad found
>(II) config/hal: Adding input device PS/2 Mouse
>(II) LoadModule: "evdev"
>(II) Loading /usr/lib/X11/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 2.0.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(**) PS/2 Mouse: always reports core events
>(**) PS/2 Mouse: Device: "/dev/input/event3"
>(II) PS/2 Mouse: Found x and y relative axes
>(II) PS/2 Mouse: Found mouse buttons
>(II) PS/2 Mouse: Configuring as mouse
>(II) XINPUT: Adding extended input device "PS/2 Mouse" (type: MOUSE)
>(II) config/hal: Adding input device AT Translated Set 2 keyboard
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/X11/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.3.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(**) AT Translated Set 2 keyboard: always reports core events
>(**) Option "Protocol" "standard"
>(**) AT Translated Set 2 keyboard: Protocol: standard
>(**) Option "AutoRepeat" "350 35"
>(**) Option "XkbRules" "xorg"
>(**) AT Translated Set 2 keyboard: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) AT Translated Set 2 keyboard: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) AT Translated Set 2 keyboard: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) AT Translated Set 2 keyboard: CustomKeycodes disabled
>(II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD)
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01000000 (pgoffset 4096)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x0061ffff: compressed frame buffer (6144 kB, 0x000000007f820000 physical
>)
>(II) intel(0): 0x00620000-0x00620fff: compressed ll buffer (4 kB, 0x000000007fe20000 physical
>)
>(II) intel(0): 0x00621000-0x0062afff: HW cursors (40 kB, 0x000000007fe21000 physical
>)
>(II) intel(0): 0x0062b000-0x00632fff: logical 3D context (32 kB)
>(II) intel(0): 0x00633000-0x00633fff: overlay registers (4 kB, 0x000000007fe33000 physical
>)
>(II) intel(0): 0x00634000-0x00643fff: xaa scratch (64 kB)
>(II) intel(0): 0x007bf000:            end of stolen memory
>(II) intel(0): 0x01000000-0x01ffffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) AlpsPS/2 ALPS GlidePoint: x-axis range 0 - 1023
>(II) AlpsPS/2 ALPS GlidePoint: y-axis range 0 - 767
>(--) AlpsPS/2 ALPS GlidePoint touchpad found
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>SetClientVersion: 0 9
>SetGrabKeysState - disabled
>SetGrabKeysState - enabled
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
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>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(EE) intel(0): underrun on pipe B!
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) PS/2 Mouse: Close

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Attachments on bug 23739: 4453